Implementation of the Keccak Hash Function in FPGA Devices
نویسنده
چکیده
Implementation setup The Keccak hardware reference designs consists of two rather different implementations. the high_speed_core design is, as the name suggest, a self contained high performance design. The low_area_copro on the other hand, is a small design where the state memory is external from the rest of the design. This allows the Keccak coprocessor to share memory with other design entities within a device.
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